The inventive concepts relate to a memory, a memory system, and/or an error checking and correcting method for a memory, and more particularly, to a memory, a memory system, and/or an error checking and correcting method of a memory optimized to a scheme applied to a flash memory for improving reliability of the flash memory and reducing power consumption and latency of the flash memory.
Flash memories have been scaled down and the number of bits stored in each of memory cells has been increased. Therefore, a read margin between program states has been decreased, and thus, a read error occurs frequently. Therefore, solutions for accurately and efficiently checking for and correcting errors have been explored.